In this paper, we demonstrate a novel approach for fabrication of hermitically sealed, highly reliable on-chip microfluidic channel by utilizing Titanium silicide as a bonding interface between glass and silicon. Microfluidic channel etched on silicon was bonded to Titanium coated glass wafer by forming Titanium Silicide interface. This interface is formed using thermocompression bonding carried at an optimized temperature of 380°0 C and pressure of 0.2 MPa. Bond strength, scanning acoustic microscopy (SAM cross sectional scanning electron microscopy (XSEM) and dicing analyses carried out on the bonded samples indicate a highly reliable bonding interface. This CMOS compatible vertical integration process can be potentially utilized for heterogeneous integration primarily targeted towards on-chip cooling for three dimensional integrated circuits (3D-IC's) and low form factor Lab-on-Chip microfluidic platforms. © 2018 IEEE.

Shiv Govind Singh

Department of Electrical Engineering

Siva Rama Krishna Vanjari

C.H. Kumar

S. Bonam

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IIT Hyderabad

2018 IEEE CPMT Symposium Japan, ICSJ 2018

Silicide based integration approach for fabricating highly reliable, hermitically sealed on-chip, low form factor-microfluidics for 3D IC cooling applications

Journal	Data powered by Typeset2018 IEEE CPMT Symposium Japan, ICSJ 2018
Publisher	Data powered by TypesetInstitute of Electrical and Electronics Engineers Inc.