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Impact Analysis of Distributed DoS Attack by Multiple HTs in TCMP Architectures
J. Philomina, R.K. James, , D.M. Vishwanathan
Published in Institute of Electrical and Electronics Engineers Inc.
2023
Abstract
Tiled Chip Multicore Processors (TCMP) with packet switching Network-on-Chip (NoC) have become a common method for on-chip connectivity. The performance of the entire system may suffer if a malicious Hardware Trojan (HT) is present in the NoC routers as it might negatively disrupt communication between tiles. Detecting Trojans in complicated multi-processor System on Chips (SoCs) using traditional pre and post silicon validation approaches is a huge difficulty. In this paper the presence of multiple HTs in the routing unit is modelled and its impact analysis is done for both synthetic traffic and real benchmarks using gem5 simulator. It can be observed that the presence of multiple trojans decrease the overall performance of the system. © 2023 IEEE.
About the journal
Journal2023 International Conference on Control, Communication and Computing, ICCC 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.