A combination of contact and gate dielectric engineering is utilized to achieve very high performance few layer MoS2 FET. Sulfur treatment before the formation of Ni and Pd source/drain contacts helps in reducing the schottky barrier height and thereby resulting in 10× reduction in contact resistance. The e-beam evaporated 30nm HfO2 gate dielectric, with optimized processing condition, yields 6.1nm EOT, with interface trap density in the mid 1011 /cm2 range. The top gated MoS2 FET demonstrates field effect mobility of 63 cm2/V-sec. This FET is used along with a depletion mode n-channel FET load, to demonstrate inverter circuit characteristics with output to input gain of 9. © The Electrochemical Society.