This paper presents the design and analysis of a recycling folded-cascode (RFC) OTA intended for any generic capacitive-feedback ECG amplifier. The gmID methodology is utilized for sizing the RFC OTA, to achieve the prime targets of ultra-low power consumption and low input referred noise. The improved RFC topology is used to achieve higher CMRR. A detailed noise analysis of the overall IA is also included. An account of the chief contributors to the IA’s overall noise and design techniques to minimize the same is incorporated. Implemented using UMC 0.18 μ m, the complete circuit consumes a power of 0.47 μ from a 1.8 V supply. The post-layout simulation results show that the designed circuit satisfies all essential specifications of an ECG acquisition system. © 2023, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.

Ashudeb Dutta

Department of Electrical Engineering

P.K. Jha

P. Patra

Indian Institute of Technology Hyderabad (IITH) is a premier institute of science and technology established in 2008. IITH has been consistently ranked in the&nbsp;<a href="https://iith.ac.in/reports/" rel="noopener noreferrer">top 10 institutes</a>&nbsp;in India for Engineering&nbsp;<a href="https://www.nirfindia.org/2021/EngineeringRanking.html" rel="noopener noreferrer" target="_blank">according to NIRF</a>&nbsp;making it one of the most coveted schools for science and technology in the country.

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Journal	Analog Integrated Circuits and Signal Processing
Publisher	Springer
ISSN	09251030