This paper introduces the concept of co-ordinate rotation into the conventional FastICA algorithm and proposes a low complexity 2D FastICA and presents its corresponding architecture. Conventional FastICA uses a preprocessing step involving classical Eigen Value Decomposition problem which, in hardware, is widely solved using Co-ordinate Rotation Digital Computer (CORDIC) technique. The proposed co-ordinate rotation based 2D FastICA algorithm opens up the opportunity to reuse the same CORDIC unit used for the preprocessing step and thus is capable of reducing the hardware complexity of the conventional FastICA algorithm. Along with the formulation and functionality validation of the proposed algorithm, a detailed hardware complexity analysis is also presented in this paper and compared with the already reported architectures. © 2010 IEEE.