Contrary to the conventional belief that cognitive functions are dictated by activation of brain areas, recent research shows that brain-wide functional connectivity network plays more fundamental role. Due to the prevalence of neurocognitive and motor diseases understanding of the nature of such functional connectivity is paramount in devising effective treatment and management strategy. It has already been shown that functional connectivity network derived from EEG (electroencephalogram) recordings exhibit different topography for different neurocognitive conditions. This opens up the possibility of identifying effective markers for predicting cognitive decline by quantitative analysis of such networks. More importantly this may lead to a new type of non-invasive therapy where such connectivity-guided neuromodulation techniques could be initiated for managing cognitive deficit on the fly in nomadic environment. However, one pre-requisite of such approach is the ability to extract the functional connectivity from multichannel EEG in real time. In other words, it necessitates to build a novel architecture for real-time quantitative characterization of functional brain connectivity networks derived from Electroencephalogram (EEG). It consists of two main parts—calculation of Phase Lag Index (PLI) to form the functional connectivity networks and the extraction of a set of graph-theoretic parameters to quantitatively characterize these networks. Owing to the computationally intensive nature of functional connectivity extraction, this is only possible if suitable hardware accelerator is designed. In this chapter we have explored the most efficient hardware architecture for functional brain connectivity formulation from multichannel EEG data after removing the artefacts. Extracted the markers for its quantitative characterization and finally for computing the temporal variability of such markers which typically conveys the implicit nature of cognitive efficiency. Once the EEG data is received, some form of transformation needs to be carried out on the matrix. This generates various patterns which would help in generating a network topology for analysis of the brain cognition network. This analysis of various brain states for neurological anomalies and a normal state by creating a graphical model-based visualization of the transformation which is time consuming and requires hardware acceleration. Novel signal processing algorithms has been developed and holistic algorithm—architecture optimization has been carried out for efficient mapping of the algorithm into hardware which has been implemented in FPGA. © Springer Nature Singapore Pte Ltd. 2022. All rights are reserved.